;**************************************************************** ; SPI Configuration 1 pour DAC 2 pour LCD ;**************************************************************** SPI_Config .macro Conf .if Conf=1 ; SPI initialization pour DSP-> DAC (clk pol 1, no clkphase, master, no INT) LDP #0E0h SPLK #00C7h,SPI_CNTL1 ; Reset SPI by writing 1 to SWRST !!!clk pol1 ; SPLK #0087h,SPI_CNTL1 ; Reset SPI by writing 1 to SWRST !!!clk pol0 ; SPLK #000Ch,SPI_CNTL2 ; Disable ints & TALK, normal clock, master mode clk phase 1 SPLK #0004h,SPI_CNTL2 ; Disable ints & TALK, normal clock, master mode clk phase 0 SPLK #0000h,SPI_PRI ; Set SPI interrupt to high priority. ; SPLK #0000h,SPI_BAUD ; Baudrate = Fatest as possible ! SYSCLK/4 et ça marche ! SPLK #0005h,SPI_BAUD ; Baudrate = 2 MHz! SYSCLK/5 SPLK #0000h,SPI_STATUS ; Clear the SPI interrupt status bits ; SPLK #000Eh,SPI_CNTL2 ; Enable TALK, CLK ph 1, master mode + disable SPI Int SPLK #0006h,SPI_CNTL2 ; Enable TALK, CLK ph 0, master mode + disable SPI Int SPLK #0052h,SPI_PORT_C1 ; Enable the SPICLK pin function. ; SPISTE as output pin et mise à 1 ie desactive SPLK #0022h,SPI_PORT_C2 ; Set SIMO & SOMI functions to serial I/O SPLK #0047h,SPI_CNTL1 ; Release SWRST, clock polarity 1, 8 bits ; SPLK #0007h,SPI_CNTL1 ; Release SWRST, clock polarity 0, 8 bits .endif .if Conf=2 ; SPI initialization pour DSP-> LCD LDP #0E0h SPLK #00C7h,SPI_CNTL1 ; Reset SPI by writing 1 to SWRST !!!clk pol1 SPLK #000Ch,SPI_CNTL2 ; Disable ints & TALK, normal clock, master mode SPLK #0000h,SPI_PRI ; Set SPI interrupt to high priority. SPLK #0000h,SPI_BAUD ; Baudrate = SYSCLK/4 ; accepté ie 2.5 MHz, alors que le max du LCD est 2 MHz SPLK #0000h,SPI_STATUS ; Clear the SPI interrupt status bits SPLK #0006h,SPI_CNTL2 ; Enable TALK, No CLK ph, master mode + DESABLE SPI Int SPLK #0052h,SPI_PORT_C1 ; Enable the SPICLK pin function. ; SPISTE as output pin et mise à 1 ie desactive SPLK #0022h,SPI_PORT_C2 ; Set SIMO & SOMI functions to serial I/O SPLK #0047h,SPI_CNTL1 ; Release SWRST, clock polarity 1, 8 bits .endif .endm |
CS_DACon .macro LDP #00E1h LACC PADATDIR AND #0FFFDh ; IOPA1 mise à 0 ie DAC activé SACL PADATDIR .endm CS_DACoff .macro LDP #00E1h LACC PADATDIR OR #0002h ; IOPA1 mise à 1 ie DAC desactivé SACL PADATDIR .endm CS_LCDon .macro LDP #00E1h LACC PADATDIR AND #0FFFBh ; IOPA2 mise à 0 ie LCD activé SACL PADATDIR .endm CS_LCDoff .macro LDP #00E1h LACC PADATDIR OR #0004h ; IOPA2 mise à 1 ie LCD desactivé SACL PADATDIR .endm |